The invention relates to parallel processing arrays, and more particularly to communications among individual processing elements of a multidimensional array, such as a MIMD (multiple instruction--multiple data stream) processor array for high speed computing.
A recognized source of multiple processing system inefficiencies is the movement of data between system, or array, elements. One approach to inter-element data exchange is to use a common bus along which all system-internal data is to be transferred. While this approach has favorable characteristics such as simplicity, it suffers the disadvantage of requiring all system elements to share the same communication resource, thus forcing the elements into a sequential mode of operation. For processing arrays of appreciable size, multiple inter-element data paths must be provided. However, a multiplicity of data path introduces the additional complexity of selecting the best path for each particular transfer.
Prior art data path selection systems typically require some a priori knowledge of the topology of the array, and some are operable only for a limited range of topologies. Some require physical node identification, or require data to be clocked through intervening nodes to reach the destination node.
What is needed is a data path selection system which establishes the optimal data path on a least time basis on a global scale, and which does not require a centralized controller having knowledge of the array topology. Ideally, such a system would require neither a priori information about the configuration of the array, nor arithmetic computations. Such a system would operate independent from other array functions and would not require physical identification of destination nodes or clocking of data through intervening nodes.